Electronic apparatus and control method

ABSTRACT

A voltage and internal resistance of a battery are measured in advance as its capacity decreases. In a flash memory of a device powered by the battery, voltages necessary to drive a motor, an EL display, and a bezel input unit are stored. By comparing the voltage of the battery with a resistor connected as a dummy load and the voltage read from the flash memory, it can be determined whether it is possible to drive the motor, the EL display, or the bezel input unit.

TECHNICAL FIELD

[0001] The present invention relates to a battery-driven electronicapparatus having one or more devices requiring a large amount of batterypower. There is also provided a control method for such an electronicapparatus.

BACKGROUND ART

[0002] With the recent proliferation of portable electronic apparatusessuch as mobile phones and electronic organizers, a need has arisen forrecharging and data transfer stations (hereinafter referred to simply as‘station(s)’). Such stations are commercially available and are designedto enable electronic apparatus users to both recharge devices and carryout data transfer. There are differing designs and methods of operationfor such stations. In the conventional art, either electrical contactsor a coil are employed. Use of electrical contacts enables the structureof the apparatus to be kept relatively simple, but prevents theapparatus from being able to be sealed, whereby the water resistance ofthe apparatus cannot be obtained.

[0003] A station for recharging and data transfer which is equipped witha coil can be used for the above purpose with an electronic apparatuswhich is also equipped with a coil. When data transfer or recharging abattery is to be carried out between the station and the electronicapparatus, a high frequency signal is fed to a coil of one side, therebyinducing a magnetic field around the coil. This magnetic field inducesan electric current in a coil of the other side. By rectifying theinduced current and then feeding it to a battery, the battery isrecharged. Also, extracting signals from the induced current enablestransfer of data.

[0004] When a portable electronic apparatus, using a rechargeable (or aprimary) battery as a power supply, has high load devices which consumeslarge power of the battery, battery voltage may be lowered significantlywhen the high load device is driven.

[0005] Such high load devices include, for example, a vibrator motorthat is used for notification, an electroluminescence (EL) display fordisplaying information, and a flash memory which consumes large amountof power when writing and erasing data.

[0006] These high load devices significantly lower battery voltage whenthe devices are driven. Therefore, the battery must have enough chargeand the internal resistance of the battery has to be low in order tocorrectly drive these high load devices.

[0007] Furthermore, when a high load device is driven and the batteryvoltage is lowered below the system requirement, the system fails, andrequires resetting.

[0008] In order to solve the above drawbacks, a Japanese patentapplication laid-open No. H11-259190 discloses a control method for aportable terminal with a high load device. In this method, batteryvoltages without a load and with a certain load are measured, and thenthe internal resistance of the battery is calculated. Then using thecalculated internal resistance and a load characteristic of the highload device, a predicted battery voltage is calculated for a case whenthe high load device is driven. Then a judgement is made whether thebattery voltage would be lowered below a lowest voltage for driving theportable electric device when the high load device is driven. Whendriving the high load device would not lower the battery voltage belowthe lowest voltage for driving the portable electronic appliance, thehigh load device can be driven.

[0009] Below, the calculation method disclosed in the Japanese patentapplication laid-open No. H11-259190 is explained.

[0010] When a voltage of a battery under no load is V0 (Volt) and thebattery voltage with a certain resistor R (Ω) being connected as a dummyload is V1 (volt), an internal resistance r (Ω) of the rechargeablebattery can be obtained from the following equation,

r=R·(V0−V1)/V1.

[0011] Also, when a predicted value of the battery voltage with anactual high load device being connected is V3 (volt) and the necessarypower for driving the high load device is P (watt), the followingequation is obtained,

V3=[V0+{square root}(V0²−4rP)]/2

[0012] When this predicted value of the battery voltage V3 satisfies thefollowing inequality, the high load device can be driven.

V3≧V4

[0013] Where V4 is a lowest operational voltage for driving the portableterminal.

[0014] A drawback of this prior art method, however, is the need tocomplete a complicated calculation before actually driving a high loaddevice. Completion of such a calculation is time-consuming, making itdifficult to apply the method, to, for example, an EL display. Namely,when controlling an EL display, rapid judgement must be made todetermine whether using the EL display is possible.

[0015] Also, in order to obtain a calculation result rapidly, ancalculation circuit is subject to a high load, whereby power consumptionis increased.

[0016] Also, the above conventional method does not allow a high loaddevice to be connected directly to a battery that is a preceding step ofconstant voltage circuit.

[0017] Also, even when a device can work below the rated output voltageof the constant voltage circuit, if the output voltage of the constantvoltage circuit declines below the rated output voltage, the systemfails first, and the device can not be driven.

DISCLOSURE OF INVENTION

[0018] An object of the present invention is to provide an electronicapparatus and to provide a control method for it that can drive a highload device without a complicated calculation and with a quickdetermination whether the device can be driven, and that does not allowthe system to fail when voltage of a rechargeable battery or a primarybattery is lowered because the high load device is driven.

[0019] Another object of the present invention is to provide anelectronic apparatus comprising:

[0020] a power supply that supplies power;

[0021] a driven unit that is driven by the power from the power supply;

[0022] a dummy load that discharges the power supply;

[0023] a switch that connects or disconnects the dummy load to or fromthe power supply;

[0024] a storage unit that associates and stores both a voltage of thepower supply on which no load is imposed and a voltage of the powersupply with its internal resistance being a highest allowable value andthe dummy load being connected, the highest allowable value of theinternal resistance being the highest internal resistance of the powersupply that can drive the driven unit when no load is connected;

[0025] a voltage measurement unit that measures voltage of the powersupply;

[0026] a comparison unit that compares a first voltage and a secondvoltage, the first voltage, measured by the voltage measurement unit,being a voltage of the power supply with the dummy load being connected,and the second voltage being the voltage of the power supply with itsinternal resistance being the highest allowable value and the dummy loadbeing connected and the second voltage being read from the storage unitaccording to a voltage, measured by the voltage measurement unit, of thepower supply with no load being connected; and

[0027] a determination unit that determines whether the driven unit canbe driven based on the comparison result, and, when it is possible todrive the driven unit, drives the driven unit.

[0028] Yet another object of the present invention is to provide acontrol method of an electronic apparatus:

[0029] the electronic apparatus comprising;

[0030] a power supply that supplies power;

[0031] a driven unit that is driven by the power from the power supply;

[0032] a dummy load that discharges the power supply;

[0033] a switch that connects or disconnects the dummy load to or fromthe power supply;

[0034] a storage unit that associates and stores both a voltage of thepower supply on which no load is imposed and a voltage of the powersupply with its internal resistance being a highest allowable value andthe dummy load being connected, the highest allowable value of theinternal resistance being the highest internal resistance of the powersupply that can drive the driven unit when no load is connected; and

[0035] a voltage measurement unit that measures voltage of the powersupply;

[0036] the control method comprising;

[0037] comparing a first voltage and a second voltage, the firstvoltage, measured by the voltage measurement unit, being a voltage ofthe power supply with the dummy load being connected, and the secondvoltage being the voltage of the power supply with its internalresistance being the highest allowable value and the dummy load beingconnected and the second voltage being read from the storage unitaccording to a voltage, measured by the voltage measurement unit, of thepower supply with no load being connected;

[0038] determining whether the driven unit can be driven based on thecomparison result; and

[0039] driving the driven unit when it is determined that driving thedriven unit is possible.

[0040] Further object of the present invention is to provide anelectronic apparatus comprising:

[0041] a power supply for supplying a first power;

[0042] a communication unit for receiving power from an external powersupply and supplying the power as a second power;

[0043] a driven unit that is driven by the first or the second power;

[0044] a judging unit that judges that, when the first power is notsufficient to drive the driven unit, judges if power is supplied fromthe external power supply; and

[0045] a drive prohibit unit that, when the first power is notsufficient to drive the driven unit and when the external power supplydoes not supply enough power to drive the driven unit, prohibits thedriven unit from being driven.

BRIEF DESCRIPTION OF THE DRAWINGS

[0046]FIG. 1 is a plane view of a configuration of a station and anelectronic timepiece of a first embodiment.

[0047]FIG. 2 is a sectional view taken along a line A-A in FIG. 1.

[0048]FIG. 3 is a block diagram illustrating an electronic configurationof the electronic timepiece of the first embodiment.

[0049]FIG. 4 is a flowchart illustrating an operation of the firstembodiment.

[0050]FIG. 5 is a diagram illustrating data structure in a flash memory.

[0051]FIG. 6 is a diagram illustrating a concrete example of data in theflash memory.

[0052]FIG. 7 is a block diagram illustrating an electrical configurationof the electronic timepiece of the second embodiment.

[0053]FIG. 8 is a flowchart illustrating an operation of the secondembodiment.

[0054]FIG. 9 is a flowchart illustrating an operation of the thirdembodiment.

[0055]FIG. 10 is a block diagram illustrating an electricalconfiguration of the electronic timepiece of the fourth embodiment.

[0056]FIG. 11 is a flowchart illustrating an operation of the fourthembodiment.

[0057]FIG. 12 is a block diagram illustrating an electronic timepieceand a battery charger of a fifth modification.

[0058]FIG. 13 is a flowchart illustrating an operation of the CPU of thebattery charger of the fifth modification.

[0059]FIG. 14 is a flowchart illustrating an operation of the CPU of thebattery charger of the fifth modification.

[0060]FIG. 15 is a block diagram illustrating a conventional electronictimepiece and a conventional battery charger.

BEST MODE OF CARRYING OUT THE INVENTION

[0061] [1] First Embodiment

[0062] [1.1] Mechanical Configuration

[0063]FIG. 1 is a diagram illustrating a station 100 and an electronictimepiece 200 of the first embodiment.

[0064] In FIG. 1, electronic timepiece 200 is placed in a concavesection 101 of station 100 to recharge its battery or transfer data.Concave section 101 is made to be slightly larger than body 201 and band202 of electronic timepiece 200 to enable electronic timepiece 200 to beembedded in concave section 101.

[0065] Station 100 has a recharging start button 103 ₁ for activatingcharging of battery, a transfer start button 103 ₂ for activating datatransfer, and other buttons, and a display 104 for displaying a varietyof information. Electronic timepiece 200 is worn on the wrist of a user,and displays a date and time. Electronic timepiece 200 also has anunshown sensor and periodically measures and stores a biologicalinformation such as the pulse rate and the heart rate.

[0066]FIG. 2 is a sectional view taken along a line A-A in FIG. 1.

[0067]FIG. 2 shows a cross section of concave portion 101 of station 100and electronic timepiece 200. Electronic timepiece 200 has a case back212 with a cover glass 211. Inside cover glass 211 is a coil 210 fordata transfer and recharging a battery. Watch body 201 also has acircuit substrate 221 that is connected to rechargeable battery 220 andcoil 210.

[0068] Facing coil 210 of timepiece 200 is a coil 110 of station 100.Coil 110 is covered by a cover glass 111. Station 100 also has a circuitsubstrate 121 that is connected to coil 110, recharging start button 103₁, transfer start button 103 ₂, display 104, and a primary battery (notshown).

[0069] As described above, coil 110 of station 100 is not in contactwith coil 210 of electronic timepiece 200. However, data transfer iseffected by using these coils.

[0070] Coils 110 and 210 of station 100 and electronic timepiece 200 arenot provided with magnetic cores, whereby the timepiece can be madelighter and mechanical parts of the timepiece are not magnetized. Ifweight and magnetic interference are not important factors in a device,coils with magnetic cores can be employed. However, if a signal fed to acoil has a sufficiency high frequency, it is not necessary to provide amagnetic core.

[0071] [1.2] Data in the Flash Memory

[0072] In FIG. 3, components of electronic timepiece 200 are shown. Aflash memory 247 will be described first. Before shipment of electronictimepiece 200, a determination data VTL is stored in flash memory 247.During use of electronic timepiece 200, on the basis of this data VTL itis determined whether sufficient voltage charge remains in the batteryof electronic timepiece 200 for a particular high load device to bedriven. In the case that insufficient charge remains in the battery toenable a high load device to be used, there is danger that operation ofelectronic timepiece 200 itself will fail when an attempt is made todrive the high load device. Determination data VTL provides diagnosticcriterion for preventing this kind of device failure. This data VTL isused after a consumer buys the electronic timepiece.

[0073] In FIG. 5, on the left, a structure of data VTL is shown where 19bits represent an address: on the right, a structure is shown where 16bits provide information about the address. Higher order 3 bits in anaddress indicate a function of the address.

[0074] For example, when an address has a higher order 3 bits of “000”,it is determined that the address indicates a location where data forenabling only a bezel input unit 240 to be driven is stored. Datadesignated by the address is used in deciding whether there issufficient battery charge for bezel input unit 240 to be driven.

[0075] Similarly if, for example, an address has a higher order 3 bitsof “001”, the address indicates a location where data for enabling onlyan EL display 239 is stored. Data designated by such an address is usedwhen deciding whether EL display 239 can be driven.

[0076] When an address has a higher order 3 bits of “010”, the addressindicates a location where data for driving only a motor 238 is stored.The data designated by this address is used to determine whether it ispossible for motor 238 to be driven.

[0077] For example, when an address has a higher order 3 bits of “011”,the address indicates a location where data for enabling both bezelinput unit 240 and EL display 239 at the same time to be used is stored.On the basis of this data it is also determined whether bezel input unit240 and EL display 239 can be used at the same time.

[0078] For example, when an address has a higher order 3 bits of “100”,the address indicates a location where data for enabling both bezelinput unit 240 and motor 238 at the same time to be used is stored. Onthe basis of this data it is also determined whether bezel input unit240 and motor 238 can be used at the same time.

[0079] In another example, when an address has a higher order 3 bits of“101”, the address indicates a location where data for enabling both ELdisplay 239 and motor 238 at the same time to be used is stored. On thebasis of this data it is also determined whether EL display 239 andmotor 238 can be used at the same time.

[0080] In yet another example, when an address has a higher order 3 bitsof “110”, the address indicates a location where data for enabling allof bezel input unit 240, EL display 239, and motor 238 at the same timeto be used is stored. On the basis of this data it is also determinedwhether all of bezel input unit 240, EL display 239, and motor 238 canbe used at the same time.

[0081] The succeeding 16 bits can have a value from “1111111111111111”to “0000000000000000”. Therefore, the address for bezel input unit 240can have a value from “0001111111111111111” to “0000000000000000000”.After the data for each address is set, a table as shown in FIG. 6 canbe obtained.

[0082] In FIG. 6, a data list of voltage is shown.

[0083] Since decimal digits are used, a binary value “1111111111111111”becomes “65535”. This data “65535” appearing in the upper portion ofFIG. 6 corresponds to a lower order 16 bits “1111111111111111”, and thisbinary value has data “757”.

[0084] In FIG. 6, data “65535” represents of 5 volts which is obtainedwhen no load is imposed on the battery. Also, data “757” represents of3.634 volts.

[0085] Thus, if a voltage of a battery with no load being imposed is 5volts, and the load which will be imposed in using a high load devicewill result in voltage of the battery falling below 3.634 volts, it isdetermined that the high load device cannot be used.

[0086] Next, a method of forming data VTL in the first embodiment willbe described.

[0087] When a lowest necessary voltage of battery 220 with a loadimposed for driving an electric timepiece 200 is V4, the value ofresistance of a dummy load provided by resistor 232 is RT, and theconverted value of resistance of a high load device is RX.

[0088] Also, when the voltage of battery 220 with no load imposed is V0,a highest allowable internal resistance RL of rechargeable battery 220is obtained by the following equation,

RL=RX·(V0−V4)/V4

[0089] The RL is a highest allowable value of internal resistance ofrechargeable battery 220, therefore, when the battery has a higherinternal resistance than the RL, electronic timepiece 200 is not able tooperate.

[0090] When calculating the converted value of resistance RX, takingvarious loads required to drive the electronic timepiece intoconsideration enables more accurate control of the electronic timepiece.

[0091] Next, by using internal resistance RL, voltage VTL ofrechargeable battery 220 with a resistor connected as a dummy load isobtained from the following equation,

VTL=RT·[V0/(RL+RT)]

[0092] The internal resistance RL used here is a highest allowablevalue, so the voltage VTL obtained is a lowest allowable voltage.

[0093] Namely, when rechargeable battery 220 has an internal resistanceRL, the voltage V1 of battery 220 is required to be higher than voltageVTL to enable a high load device. In this case, it is determined that avoltage of battery 220 would not fall below a required value if the highload device is used, and there is thus no danger of the system failing.

[0094] Voltages VTL obtained by the above calculations and voltages V0of the rechargeable battery with no load imposed are associated andstored in flash memory 247. Consequently, the tables shown in FIGS. 5and 6 can be obtained.

[0095] In FIG. 5, voltage V0 is stored in the lower order 16 bits of theaddress in the flash memory 247, and a combination of high load devicesis indicated in the higher order 3 bits, with voltage VTL being storedas data for the addresses.

[0096] To provide an adequate safety margin, instead of an actual changein voltage of rechargeable battery 220 from 4.1 to 3.0 volts, voltagefrom 5.0 to 2.5 volts is used. Then a calculation is performed to obtainand store voltage VTL as voltage of rechargeable battery 220 with noload being imposed changes from 5 to 2.5 volts in steps which aredependent on the resolution of an analog/digital converter 237.

[0097] Next, other components shown in FIG. 3 will be described.

[0098] The electronic timepiece 200 is equipped with rechargeablebattery 220, a regulator 231, resistor 232, a transistor 233, a voltagedividing circuit 236, analog/digital converter (ADC) 237, motor 238, ELdisplay 239, and bezel input unit 240.

[0099] The rechargeable battery 220 supplies power to the entire unit ofelectronic timepiece 200. In the following description, reference ismade to a lithium ion rechargeable battery.

[0100] Regulator 231 is supplied with power from rechargeable battery220 and generates a constant voltage (in this embodiment, 2.5 Volts) toanalog/digital converter for use as a reference voltage.

[0101] Resistor 232 functions as a dummy load.

[0102] Transistor 233 is switched on and off under control of a timingcontrol circuit, described later, to connect resistor 232 torechargeable battery 220.

[0103] Voltage dividing circuit 236 has resistors 234 and 235 anddivides the voltage of rechargeable battery 220 to generate a detectiontarget voltage Vdet for determining a voltage of rechargeable battery220.

[0104] ADC 237 performs analog-to-digital conversion on the detectiontarget voltage Vdet under control of the timing control circuit togenerate a detection target voltage data DVdet with 16 bits.

[0105] Motor 238 is a part of a vibrator and is a high load device.

[0106] EL display 239 is a high load device and displays information.

[0107] Bezel input unit 240 is a high load device, and is used forinputting data.

[0108] Electronic timepiece 200 also has a motor drive request switch241, an EL display drive request switch 242, a bezel input unit driverequest switch 243, timing control circuit 244, a data latch 245, anaddress latch 246, a flash memory 247, a comparator 248, and a high loaddevice select circuit 249.

[0109] Using motor drive request switch 241, a request by a user or by amicroprocessor that controls the entire electronic timepiece (notshown), is made to drive motor 238.

[0110] Using EL display drive request switch 242, a request by a user orby a microprocessor that controls the entire electronic timepiece (notshown), is made to drive EL display 239.

[0111] Using bezel input unit drive request switch 243, a request by auser or by a microprocessor that controls the entire electronictimepiece (not shown), is made to drive bezel input unit 240.

[0112] Timing control circuit 244 performs timing control for anoperation such as voltage measurement when any of the motor driverequest switch 241, EL display drive request switch 242, or bezel inputunit drive request switch 243 is operated.

[0113] Data latch 245 latches the detection target voltage data DVdetoutput from ADC 237 when resistor 232 is connected to rechargeablebattery 220 as a dummy load under control of timing control circuit 244.

[0114] Address latch 246 latches the detection target voltage data DVdetoutput from ADC 237 when resistor 232 is connected to rechargeablebattery 220 as a dummy load. The latched data is stored as lower bits ofthe address in the flash memory under control of timing control circuit244.

[0115] Flash memory 247 pre-stores 16 bit data values of voltage VTL,and, under control of timing control circuit 244, outputs a value ofvoltage VTL according to lower bits of the address output from addresslatch 246 and the higher 3 bits output from the high load device selectcircuit.

[0116] Comparator 248 compares the detection target voltage data DVdetand the value of voltage VTL to output a comparison result data Drst.

[0117] High load device select circuit 249 outputs load selection dataDLsel having 3 bits based on operation of motor drive request switch241, EL display drive request switch 242, and bezel input unit driverequest switch 243, along with comparison result data Drst.

[0118] Timing control circuit 244 controls timings when to connectresistor 232 which is a dummy load to the rechargeable battery, when tostore data by data latch 245 and address latch 246, when to output datafrom flash memory 247, when to switch transistor 233 ON, and when toconvert data by ADC 237.

[0119] A value of resistor 232 which is a dummy load is preferablygreater than one tenth of the converted value of resistance of a highload device. This is because it is difficult to measure accurately avoltage of the rechargeable battery, in the case that a value ofresistance 232 is less than one tenth that of the high load device. Theupper limit of the value of resistor 232 is lower than the convertedvalue of the high load device and should impose as low a load aspossible on the rechargeable battery.

[0120] [1.3] Operation of the First Embodiment

[0121] Referring to FIG. 4, operation pertaining to the first embodimentwill be explained.

[0122] At an initial state, transistor 233 is assumed to be OFF.

[0123] First, timing control circuit 244 determines if a high loaddevice drive request exists based on operation of motor drive requestswitch 241, EL display drive request switch 242, or bezel input unitdrive request switch 242 (step S1).

[0124] At step S1, when none of motor drive request switch 241, ELdisplay drive request switch 242, or bezel input unit drive requestswitch 243 have been operated (step S1: NO), timing control circuit 244remains in a wait state.

[0125] At step S1, when at least one of motor drive request switch 241,EL display drive switch 242, or bezel input unit drive request switch243 is operated to make a request to drive motor 238, EL display 239, orbezel input unit 240 (step S1: YES), timing control circuit 244 drivesADC 237 and address latch 246 and causes address latch 246 to takedetection target voltage Vdet which corresponds to a voltage ofrechargeable battery 220 and is generated by voltage dividing circuit236.

[0126] In the above case, detection target voltage Vdet will not beaccurate if the rate of voltage change per unit time is not within acertain range. Such a situation may occur immediately after driving of ahigh load device stops. To avoid this problem, detection target voltageDVdet should preferably not be taken until a rate of voltage change perunit time falls within a specified range. Such a range should, forexample, preferably be within 5 mV/msec, and more preferably within 0.5mV/msec.

[0127] As a result, address latch 246 takes detection target voltageVdet which corresponds to a voltage of rechargeable battery 220 when noload is imposed. Detection target voltage Vdet is detained as lowerorder bits of the address in flash memory 247.

[0128] Next, timing control circuit 244 turns transistor 233 ON toconnect resistor 232 (step S3), which is a dummy load, to rechargeablebattery 220.

[0129] Then in order to stabilize a voltage of rechargeable battery 220,timing control circuit 244 waits for a predetermined time period (inFIG. 4, 100 msec) (step S4). Stabilization of voltage in rechargeablebattery 220 in this case means that the rate of the voltage change perunit time is within a predetermined value. The predetermined value ispreferably 5 mV/msec, and more preferably 0.5 mV/msec.

[0130] Next, timing control circuit 244 drives ADC 237 and data latch245 and causes data latch 245 to take detection target voltage Vdetwhich corresponds to a voltage of rechargeable battery 220 with resistor232 connected as a dummy load (step S5).

[0131] As a result, data latch 245 retains detection target voltageVdet.

[0132] Then, to avoid unnecessary power consumption, timing controlcircuit 244 turns transistor 233 to OFF to disconnect resistor 232 (stepS6) from rechargeable battery 220.

[0133] At the same time, high load device select circuit 249 outputs thehigher order 3 bits of the address based on operative state of motordrive request switch 241, EL display drive request switch 242, and bezelinput unit drive request switch 243.

[0134] While address latch 246 outputs to flash memory 247 the lowerorder bit of the address, and high load device select circuit 249outputs the higher order bit of the address, timing control circuit 244turns an output approval signal OE to the “H” level. As a result, flashmemory 247 outputs to comparator 248 voltage VTL as determination dataVTL which is digital data with 16 bits (step S7).

[0135] Determination data VTL corresponds to a lowest allowable voltageof rechargeable battery 220 for motor drive request switch 241, ELdisplay drive request switch 242, or bezel input unit drive requestswitch 243.

[0136] Comparator 248 then compares detection target voltage data DVdetoutput from data latch 245 with determination data VTL output from flashmemory 247 (step S8), and then outputs a comparison result data Drst.

[0137] When detection target voltage data DVdet is lower thandetermination data VTL (step S8: NO), high load device select circuit249 will finish the function without driving any of motor 238, ELdisplay 239, or bezel input unit 240: otherwise the voltage ofrechargeable battery 220 would fall below a minimum voltage required todrive electronic timepiece 200.

[0138] Conversely, in the case that detection target voltage data DVdethas a higher value than that of determination data VTL (step S8: YES),comparison result signal Drst output from comparator 248 becomes the “H”level (step S9). Thus, high load device select circuit 249 selects thehigh load device based on the state of motor drive request switch 241,EL display drive request switch 242, and bezel input unit drive requestswitch 243 (step S10).

[0139] Next, high load device select circuit 249 outputs high loaddevice selection data DLsel with 3 bits to select high load device to bedriven out of motor 238, EL display 239, and bezel input unit 240 basedon the operation states of motor drive request switch 241, EL displaydrive request switch 241, and bezel input unit drive request switch 242and comparison result data Drst.

[0140] High load device select circuit 249 determines if high loaddevice driven at step S11-A, S11-B or S11-C has been driven for apredetermined time, and also if motor drive request switch 241, EL,display drive request switch 242, and bezel input unit drive requestswitch 243 are turned to non-operative state (step S12).

[0141] When a determination of step S12 is NO, high load device selectcircuit 249 remains in a wait state.

[0142] When a determination of step S12 is YES, high load device selectcircuit 249 outputs high load device selection data DLsel with 3 bitscausing the device to cease operation, and to process shown in theflowchart is terminated.

[0143] [1.4] Effect of the First Embodiment

[0144] As described, according to the first embodiment, it is possibleto determine rapidly whether a high load device can be driven; and thisdetermination can be made without the need for complicated calculation.As a result, it is possible to avoid system failure of the electronictimepiece which would otherwise occur due to a fatal decline in batteryvoltage during use of a high load device.

[0145] [2] Second Embodiment

[0146] [2.1] Electrical Configuration

[0147] A station and an electronic timepiece of the second embodimentare almost the same as of the first embodiment. Only an electric circuitof the electronic timepiece is different. Referring to FIG. 7, theelectrical configuration of the second embodiment will be described. InFIG. 7, the same reference numerals are applied to the same units inFIG. 3.

[0148] Electronic timepiece 200 has a battery 220, a regulator 231, aresistor 232, a transistor 233, a voltage dividing circuit 236, ananalog/digital converter (ADC) 237, a motor 238, an EL display 239, anda bezel input unit 240.

[0149] Rechargeable battery 220 supplies power to the entire units ofelectronic timepiece 200.

[0150] Regulator 231 is supplied with power from rechargeable battery220 to output as a reference voltage a constant voltage (in the secondembodiment, 2.5 Volts) to an analog/digital converter, which converterwill be explained in more detail later.

[0151] Resistor 232 functions as a dummy load.

[0152] Transistor 233 is switched ON and OFF to connect and disconnectresistor 232 with rechargeable battery 220 under control of amicro-processing unit (MPU) 250 which is described later.

[0153] Voltage dividing circuit 236 is made of resistors 234 and 235 anddivides voltage of rechargeable battery 220 to generate the detectiontarget voltage for determining voltage of rechargeable battery 220.

[0154] ADC 237 performs analog-to-digital conversion on detection targetvoltage Vdet under control of MPU 250 to output detection target voltagedata Dvdet with 16 bits.

[0155] Motor 238 is one part of a vibrator and is a high load device.

[0156] EL display 239 is a high load device and is driven by an ELdriver 239A to display information.

[0157] Bezel input unit 240 is a high load device and is used forinputting data.

[0158] In this case, motor 238 is assumed to be supplied with powerdirectly from rechargeable battery 220. EL display 239 and bezel inputunit 240 are assumed to be supplied with power via regulator 231.

[0159] Electronic timepiece 200 is also equipped with motor driverequest switch 241, EL display drive request switch 242, bezel inputunit drive request switch 243, MPU 250, an LCD panel 251, a switch 252for discharging, and a diode 253.

[0160] Motor drive request switch 241 is used for a user to request todrive motor 238.

[0161] EL display drive request switch 242 is used for a user to requestto drive EL display 239.

[0162] Bezel input unit drive request switch 243 is used for a user torequest to drive bezel input unit 240.

[0163] MPU 250 controls the entire unit of electronic timepiece 200.

[0164] LCD panel 251 is driven by LCD driver 251A to displayinformation.

[0165] Switch 252 for discharging functions as a limiter switch forpreventing from overcharging rechargeable battery 220.

[0166] Diode 253 controls the direction of the charging current.

[0167] MPU 250 is equipped with first buffer 250A and second buffer 250Bfor storing data.

[0168] Also, MPU 250 carries out functions of timing control circuit244, data latch 245, address latch 246, comparator 248, and high loaddevice select circuit 249 which are explained in the first embodiment.

[0169] [2.2] Operation of the Second Embodiment

[0170] Referring to the flowchart shown in FIG. 8, operation of thesecond embodiment will now be described.

[0171] At first, transistor 233 is assumed to be OFF.

[0172] First, MPU 250 determines whether high load device drive requestexists based on operation of motor drive request switch 241, EL displaydrive request switch 242, or bezel input unit drive request switch 242(step S21).

[0173] At step S21, when all motor drive request switch 241, EL displaydrive request switch 242, and bezel input unit drive request switch 243have not been operated (step S21: NO), MPU 250 remains waiting.

[0174] When determination at step S21 is YES, MPU 250 makes a judgementif EL display drive request switch 242 was operated during driving bezelinput unit 240, or if bezel input unit drive request switch 243 wasoperated during driving EL display 239 (step S22).

[0175] When EL display drive request switch 242 was operated duringdriving bezel input unit 240, or when bezel input unit drive requestswitch 243 was operated during driving EL display 239 (step S22: YES),the process of the flowchart goes to step S25.

[0176] When EL display drive request switch 242 was not operated duringdriving bezel input unit 240, and bezel input unit drive request switch243 was not operated during driving EL display 239 (step S22: NO), MPU250 makes a judgement if any one of the high load device is being driven(step S23).

[0177] At step S23 judgement, when any one of the high load device isbeing driven (step S23: YES), MPU 250 stops the high load device (stepS24), and the process of the flowchart goes to step S25.

[0178] At judgement at step S23, when any one of the high load device isnot being driven (step S23: NO), MPU 250 makes first buffer 250A takedetection target voltage Vdet generated by voltage dividing circuit 236.

[0179] In the above case, detection target voltage Vdet is not accurateif the rate of voltage change per unit time is not within a certainrange. This might happen just after a high load device stops driving.Therefore, detection target voltage DVdet should preferably not be takenuntil the rate of voltage change per unit time becomes within a certainrange. This range, for example, is preferably within a 5 (mV/msec), andmore preferably within a 0.5 (mV/msec).

[0180] As a result, first buffer 250A retains detection target voltageVdet which corresponds to voltage of the rechargeable battery with noload being imposed as the lower order bit of the address in flash memory247.

[0181] MPU 250 then turns transistor 233 to ON (step S26) to connectresistor 232 with rechargeable battery 220 as a dummy load.

[0182] Then in order to stabilize the voltage of rechargeable battery220, MPU 250 waits for a predetermined time period (in FIG. 8, 100 msec)(step S27). Stabilization of voltage in rechargeable battery 220 in thiscase means that the rate of the voltage change per unit time is within apredetermined value. The predetermined value is preferably 5 (mV/msec),and more preferably 0.5 (mV/ msec).

[0183] Next, MPU 250 drives ADC 237 and makes second buffer 250B takedetection target voltage Vdet which corresponds to the voltage ofrechargeable battery 220 with resistor 232 connected as a dummy load(step S28).

[0184] As a result, second buffer 250B retains detection target voltageVdet that corresponds to voltage of rechargeable battery 220 withresistor connected as a dummy load.

[0185] Then, MPU 250 turns transistor 233 to OFF state (step S29) todisconnect resistor 232 from rechargeable battery 220. This suppressesunnecessary power consumption.

[0186] At the same time, MPU 250 outputs the higher order 3 bits of theaddress data based on the operation state of motor drive request switch241, EL display drive request switch 242, and bezel input unit driverequest switch 243.

[0187] While MPU 250 outputs to flash memory 247 the lower order bit ofthe address and the higher order bit of the address, MPU 250 makes anoutput approval signal OE to the “H” level. By this, flash memory 247outputs determination data VTL which is digital data with 16 bits (stepS30).

[0188] Determination data VTL corresponds to a lowest allowable voltageof rechargeable battery 220 for motor drive request switch 241, ELdisplay drive request switch 242, or bezel input unit drive requestswitch 243.

[0189] MPU 250 then compares detection target voltage data DVdet insecond buffer 250B with determination data VTL output from flash memory247 (step S31), then makes a judgement if the determination data VTL issmaller than detection target voltage data DVdet.

[0190] When detection target voltage data DVdet is lower thandetermination data VTL (step S31: NO), MPU 250 finishes the functionwithout driving any of motor 238, EL display 239, or bezel input unit240. This is because in the above case the driving any one of the highload devices will lower the voltage of rechargeable battery 220 belowthe lowest voltage for driving electronic timepiece 200.

[0191] Then a message such as “please recharge the battery.” will beshown on LCD display 251.

[0192] When this message is shown, rechargeable battery 220 does nothave much electricity, and can be recharged by placing electronictimepiece on station 100.

[0193] After recharging the battery, when the voltage of rechargeablebattery 220 exceeds a predetermined voltage (for example, 4 volts forlithium-ion battery) by recharging the battery, switch 252 fordischarging is turned ON to stop recharging.

[0194] When detection target voltage data DVdet is higher thandetermination data VTL (step S31: YES), MPU 250 drives the selected highload device (step S32), because rechargeable battery 220 has enoughelectricity to drive it.

[0195] Then MPU 250 makes a judgement if the high load device driven atstep S32 is driven for a time period predetermined for each high loaddevice, and if the operation states of motor drive request switch 241,EL display drive request switch 242, and bezel input unit drive requestswitch 243 is switched to non-operation state (step S33).

[0196] When the judgement of step S33 is NO, MPU 250 remains waiting.

[0197] When the judgement of step S33 is YES, MPU 250 stops the selectedhigh load device (step S34), and the process of the flowchart ends.

[0198] [2.3] Effect of the Second Embodiment

[0199] As described, according to the second embodiment, it is possibleto make a quick judgement if a high load device can be driven. Thisjudgement can be done without complicated calculation. By thisjudgement, the system of electronic timepiece 200 does not fail due tothe decline of the voltage incurred by the drive of the high loaddevice.

[0200] Also, even when some high load devices are connected to therechargeable battery and at the same time some high load devices areconnected to the regulator, it is possible to make a quick judgement ifa high load device can be driven. Also, this judgement does not halt thesystem of electronic timepiece 200 due to the decline of the voltageincurred by the drive of the high load device.

[0201] [2.4] Modifications of the Second Embodiment

[0202] Processes at steps S24 through S28 may be automatically conductedin a predetermined cycle when no high load device is being driven. Thenthe newest output value of ADC 237 may be retained. By these, there willbe no necessity to stop the high load device at step S24.

[0203] [3] Third Embodiment

[0204] A station and an electronic timepiece of the third embodiment arethe same as of the first embodiment, but an electrical configuration ofthe electronic timepiece

[0205] First, an explanation will be given of a data making method forthe flash memory.

[0206] As described, there are cases where some high load devices areconnected to the rechargeable battery and at the same time some highload devices are connected to the regulator. In these cases, by using acombined resistance and resistance of the regulator, highest allowableinternal resistance RL is calculated for each high load device. Thendata for the high load device with the severest condition for driving isstored in flash memory 247.

[0207] Voltage V01 of the rechargeable battery with no load beingapplied is associated with address in flash memory 247 and then isassigned as voltage VTL.

[0208] Then voltage V0 is varied to make a table.

[0209] From here, an explanation will be given using actual examples ofthe following conditions.

[0210] Battery voltage with no load connected is 3.5 Volts.

[0211] Output voltage of the regulator is 2.5 Volts.

[0212] Value of resistance converted from voltage drop of the regulatoris 10 (Ω).

[0213] Lowest required voltage V4 to drive a high load device (motor) is2 Volts.

[0214] Lowest required voltage V4 to drive a high load device (ELdisplay or Bezel input unit) is 2.5 Volts.

[0215] Load resistance Rmo of the motor is 100 (Ω).

[0216] Load resistance of the EL display is 200 (Ω).

[0217] Load resistance of the bezel input unit is 1000 (Ω).

[0218] When the above values are given, explanation is given of a casewhere the bezel input unit and the EL display are driven at the sametime.

[0219] From here, in order to make the explanation simple, an assumptionis used that only motor 238 is connected to rechargeable battery 220 andbezel input unit 240 and EL display 239 are connected to regulator 231.In an actual case, when there are a plurality of loads connected torechargeable battery 220, a combined resistance of these loads may beused as a resistance connected to the battery. Also, when there are aplurality of loads connected to regulator 231, a combined resistance ofthese loads may be used as a resistance connected to regulator 231.

[0220] From conditions mentioned above, the motor connected to thebattery is equivalent to 100Ω, and a combined resistance of EL display239 and bezel input unit 240 both connected to regulator 231 isequivalent to 166Ω.

[0221] From these, a highest allowable internal resistance ofrechargeable battery 220 to drive a high load device is calculated.

[0222] A highest allowable internal resistance RLmt to drive motor 238can be obtained from the following equation.

RLmt=(V0−V4)/((V4/Rmo)+(V4/(Reb+REGd)))

[0223] Applying the above value, the following value is calculated.

RLmt=(3.5−2)/((2/100)+(2/(166+10)))=50.8Ω

[0224] On the other hand, a highest allowable internal resistance RLelof rechargeable battery 220 to drive EL display 239 connected toregulator 231 can be obtained from the following equation.$\begin{matrix}{{RLel} = {\left( {{V0} - \left( {{V4} + {{REGd} \cdot {{V4}/{Reb}}}} \right)} \right)/\left( {\left( {{V4}/{Reb}} \right) +} \right.}} \\\left. {\left( {\left( {{V4} \cdot {{REGd}/{Reb}}} \right) + {V4}} \right)/{Rem}} \right)\end{matrix}$

[0225] Applying the above value, the following value is calculated.$\begin{matrix}{{RLel} = {\left( {3.5 - \left( {2.5 + {10 \cdot {2.5/166}}} \right)} \right)/\left( {\left( {2.5/166} \right) +} \right.}} \\{\left. {\left( {\left( {2.5 \cdot {10/166}} \right) + 2.5} \right)/100} \right) = {20.43\quad \Omega}}\end{matrix}$

[0226] Similarly, a highest allowable internal resistance RLbz ofrechargeable battery 220 to drive bezel input unit 240 can be obtained.

RLbz=20.43Ω

[0227] RLel and RLbz are the lowest among the highest allowable internalresistance RLmt, RLel, and RLbz. So RLel or RLbz is stored in the flashmemory.

[0228]FIG. 5 shows a relation between a table for driving high loaddevice and addresses in flash memory 247.

[0229] Configuration of the data is the same as that in the firstembodiment, so explanation of the data is not given.

[0230] Also, other data making method is explained for a case wherethere is a load connected to rechargeable battery 220 and a loadconnected to regulator 231 and these loads are driven at the same timewith a voltage of the rechargeable battery lower than a rated voltage ofregulator 231.

[0231] Here, following reference symbols are used:

[0232] a voltage of the rechargeable battery with no load beingconnected is V0,

[0233] a voltage of the rechargeable battery with a dummy load beingconnected is V1,

[0234] a lowest required voltage of the rechargeable battery with a loadbeing connected is V4,

[0235] a value of resistance of a dummy load is RT,

[0236] a value of resistance of a battery-driven device to be driven isRmo,

[0237] a value of resistance of a regulator-driven device to be drivenis Reb,

[0238] a rated voltage of the regulator is REGout,

[0239] a converted resistance from voltage drop of the regulator isREGd,

[0240] REGdd is conversion factor for resistance for voltage drop of thevoltage regulator in a case where voltage of the power supply is lowerthan constant voltage REGout,

[0241] In this case, highest allowable internal resistance RL fordriving values Rmo and Reb are obtained from the equation below.

[0242] (1) value of allowable resistance RL1 for value Rmo$\begin{matrix}{{RL1} = {\left( {{V0} - {V4}} \right)/\left( {\left( {{V4}/{Rmo}} \right) +} \right.}} \\\left. {{V4}/\left( {{Reb} + {REGd} + \left( {{REGdd} \cdot \left( {{REGout} - {V4}} \right)} \right)} \right)} \right)\end{matrix}$

[0243] (2) value of allowable resistance RL2 for value Reb$\begin{matrix}{{RL2} = \left( {{V0} - \left( {{V4} + {{V4} \cdot \left( {{REGd} +} \right.}} \right.} \right.} \\{\left. \left. {\left. {{REGdd} \cdot \left( {{REGout} - {V4}} \right)} \right)/{Reb}} \right) \right)/\left( {\left( {{V4}/{Reb}} \right) +} \right.} \\\left( \left( {\left( {{V4} \cdot {\left( {{REGd} + {{REGdd} \cdot \left( {{REout} - {V4}} \right)}} \right)/{Reb}}} \right) + {{V4}/{Rmo}}} \right) \right)\end{matrix}$

[0244] Then RL1 and RL2 are compared, and the value of the lower is setto the highest allowable internal resistance RL.

[0245] Next, when the internal resistance of the rechargeable battery isthe highest allowable internal resistance RL, a voltage VTL of therechargeable battery with a dummy load having a resistance RT beingconnected is calculated by using a following equation.

VTL=RT·(V0/(RL+RT))

[0246] Then voltage V0 of the rechargeable battery with no load beingconnected is associated to address in flash memory 247. VTL obtainedabove is set as data for these addresses. Then voltage V0 is varied toobtain VTL. Consequently, table shown in FIG. 6 can be obtained.

[0247] [3.1] Operation of the Third Embodiment

[0248] Referring to the flowchart shown in FIG. 9, the operation of thethird embodiment will be described.

[0249] At the initial state, transistor 233 is in the OFF state.

[0250] First, MPU 250 makes a judgement if there is a high load devicedrive request based on the operation of motor drive request switch 241,EL display drive request switch 242, and bezel input unit drive requestswitch 242 (step S41).

[0251] At step S41, when all motor drive request switch 241, EL displaydrive request switch 242, and bezel input unit drive request switch 243have not been operated (step S41: NO), MPU 250 remains waiting.

[0252] At step S41, when at least any one of motor, EL panel, or bezelinput unit is request to drive, a drive request flag is set for therequested high load device (the flag is turned to the ON state) (stepS42).

[0253] Then MPU 250 stops operating high load device (step S43).

[0254] Then MPU 250 makes first buffer 250A take detection targetvoltage Vdet generated by voltage dividing circuit 236 (step S44).

[0255] In the above case, detection target voltage Vdet is not accurateif the rate of voltage change per unit time is not within a certainrange. This might happen just after a high load device stops driving.Therefore, the detection target voltage DVdet is preferably not takenuntil the rate of the voltage change per unit time becomes within acertain range. This range, for example, is preferably within a 5(mV/msec), and more preferably within a 0.5 (mV/msec).

[0256] As a result, first buffer 250A retains detection target voltageVdet as the lower order bit of the address in flash memory 247.

[0257] MPU 250 then turns transistor 233 ON (step S45) to connectresistor 232 with rechargeable battery 220 as a dummy load.

[0258] Then in order to stabilize voltage of rechargeable battery 220,MPU 250 waits for a predetermined time period (in FIG. 9, 100 msec)(step S46). Stabilization of voltage in rechargeable battery 220 in thiscase means that the rate of the voltage change per unit time is within apredetermined value. The predetermined value is preferably 5 (mV/msec),and more preferably 0.5 (mV/msec).

[0259] Next, MPU 250 drives ADC 237 and makes second buffer 250B takedetection target voltage Vdet which corresponds to the voltage ofrechargeable battery 220 with resistor 232 connected as a dummy load(step S47).

[0260] As a result, second buffer 250B retains detection target voltageVdet that corresponds to voltage of rechargeable battery 220 withresistor connected as a dummy load.

[0261] Then, MPU 250 turns transistor 233 to the OFF state (step S48) todisconnect resistor 232 from rechargeable battery 220. This suppressesunnecessary power consumption.

[0262] At the same time, MPU 250 outputs to flash memory 247 the higherorder 3 bits of the address based on the operation state of motor driverequest switch 241, EL display drive request switch 242, and bezel inputunit drive request switch 243.

[0263] While MPU 250 outputs to flash memory 247 the lower order bit ofthe address and the higher order bit of the address, MPU 250 makes anoutput approval signal OE to the “H” level. By this, flash memory 247outputs determination data VTL which is digital data with 16 bits (stepS49).

[0264] Determination data VTL corresponds to a lowest allowable voltageof rechargeable battery 220 for motor drive request switch 241, ELdisplay drive request switch 242, or bezel input unit drive requestswitch 243.

[0265] MPU 250 then compares detection target voltage data DVdet insecond buffer 250B with determination data VTL output from flash memory247 (step S50), then makes a judgement if the determination data VTL issmaller than detection target voltage data DVdet.

[0266] When detection target voltage data DVdet is lower thandetermination data VTL (step S50: NO), MPU 250 does not drive motor 238,EL display 239, or bezel input unit 240 with the set drive request flag.This is because in the above case driving any one of the high loaddevices will lower the voltage of rechargeable battery 220 below theminimum voltage for driving electronic timepiece 200.

[0267] Then a message such as “please recharge the battery.” will beshown on LCD display 251.

[0268] When this message is shown, rechargeable battery 220 does notmuch electricity, so electronic timepiece 200 is placed on station 100.Then rechargeable battery 220 is recharged.

[0269] After recharging the battery, when the voltage of rechargeablebattery 220 exceeds a predetermined voltage (for example, 4 volts forlithium-ion battery), switch 252 for discharging is turned ON to stoprecharging.

[0270] When detection target voltage data DVdet is higher thandetermination data VTL (step S50: YES), MPU 250 drives the high loaddevice with the drive request flag being set (step S51), becauserechargeable battery 220 has enough electricity to drive it.

[0271] Then MPU 250 makes a judgement if the high load device driven atstep S51 is driven for a time period predetermined for each high loaddevice, and if the operation states of motor drive request switch 241,EL display drive request switch 242, and bezel input unit drive requestswitch 243 is switched to non-operation state (step S52).

[0272] When the judgement of step S52 is NO, MPU 250 remains waiting.

[0273] When the judgement of step S52 is YES, MPU 250 stops the selectedhigh load device (step S53) and clears the drive request flag for theselected high load device (step S54), and the process of the flowchartends.

[0274] [3.2] Effect of the Third Embodiment

[0275] As described, according to the third embodiment, it is possibleto make a quick judgement if a high load device can be driven. Thisjudgement can be done without complicated calculation. By thisjudgement, the system of the electronic timepiece does not fail due tothe decline of the voltage incurred by the drive of the high loaddevice.

[0276] Also, even when some high load devices are connected to therechargeable battery and at the same time some high load devices areconnected to the regulator, it is possible to make a quick judgement ifa high load device can be driven. Also, this judgement does not halt thesystem of electronic timepiece 200 due to the decline of the voltageincurred by the drive of the high load device.

[0277] [4] Modifications of the First, the Second, and the ThirdEmbodiments

[0278] [4.1] First Modification

[0279] In the above explanations, a rechargeable battery is used as apower supply. However, a primary battery may be also used as a powersupply in the present invention.

[0280] [4.2] Second Modification

[0281] In the above explanation, only one high load device is driven.However, when there are more than one high load devices and a pluralityof high load devices are driven at the same time, the composed value ofall the converted resistances from the driven devices can be used as theconverted resistance.

[0282] [4.3] Third Modification

[0283] In the above explanation, the station 100 is used as batterycharger and electronic timepiece 200 is used as a recharged device.However, the present invention may be applied to all the electronicapparatus with devices whose power consumption is relatively high like aflash memory. The present invention can also be applied to a batterycharger and a rechargeable device with a rechargeable battery and a highload device such as a cordless phone, a mobile telephone, a personalhandy phone, or a portable computer, a personal digital assistance(PDA). And the high load device may be a flash memory, anelectroluminescence (EL) display, a vibrator motor, a buzzer, or an LED.

[0284] [5] Fourth Embodiment

[0285] A station and an electronic timepiece of the fourth embodimentare almost the same as of the first embodiment. Only an electric circuitof the electronic timepiece is different. Therefore, referring to FIG.10, the electrical configuration of electronic timepiece 200 of thefourth embodiment will be described.

[0286] A coil 210 of electronic timepiece 200 has one terminal Pconnected to the positive terminal of rechargeable battery 220 via adiode 261 and other terminal connected to the negative terminal ofrechargeable battery 220.

[0287] When pulse signals are fed to coil 110 of the station, magneticfield is induced around coil 110. This magnetic field induces voltage incoil 210 of electronic timepiece 200. By this induced voltage, currentflows to rechargeable battery 220 after rectified by diode 261.Rechargeable battery 200 is used as a power supply.

[0288] Electronic timepiece 200 has a microprocessor unit (MPU) 290 thatcontrols signal transmission, measures voltage of battery, and controlsthe entire units of the electronic timepiece. MPU 290 receives signalstransmitted by station 100 via diode 262.

[0289] When MPU 290 transmits data to a personal computer that isconnected to station 100, MPU 290 drives and uses transistor 263 totransmit data.

[0290] MPU 290 also controls writing and reading files in flash memory280 by referring a file deleting request signal Sdel, a rechargingand/or communication judgement signal Sc/c, and a ready/busy signalSr/b, and by using an address bus 264 and a data bus 265.

[0291] Here, file deleting request signal Sdel is turned to the “L”level when a file deleting request switch 275 is turned ON.

[0292] The recharging and/or communication judgement signal Sc/c isoutput by a communication detection circuit 260 that detects ifelectronic timepiece 200 is charged by station 100 or is conductingcommunication with station 100 by using data for judgement output fromstation 100.

[0293] Ready/busy signal Sr/b is output from flash memory 280.

[0294] Flash memory 280 stores data even after power is turned off.

[0295] [5.1] Operation of the Fourth Embodiment

[0296] Next, an operation of the fourth embodiment will be described byusing an erasing operation of the high power consuming flash memory 280as an example.

[0297]FIG. 11 is a flow chart of the process during erasing data in theflash memory.

[0298] MPU 290 first makes a judgement if the file deleting requestswitch 275 is turned ON based on file deleting request signal Sdel (stepS61).

[0299] When the result of judgment of step S61 is NO, MPU 290 remainswaiting.

[0300] When the result of judgment at step S61 is YES, MPU 290 sets adelete request flag to the “H” (step S62).

[0301] Then MPU 290 makes a judgement if the voltage of the battery ishigher than a predetermined battery voltage that is high enough todelete files in the flash memory (step S63).

[0302] When result of the judgment of step S63 is YES, MPU 290 issues acommand for deleting files toward flash memory 280 (step S74).

[0303] Then MPU 290 examines state of flash memory 280 by using aready/busy signal Sr/b. In more detail, MPU 290 examines if ready/busysignal is in the “H” level (step S75).

[0304] When ready/busy signal Sr/b has the “H” level, the flash memoryis ready for deleting files. When ready/busy signal Sr/b has the “L”level, the flash memory is busy in deleting files.

[0305] When the judgement of step S75 is YES, flash memory 280 is inready and the deleting files is finished. Therefore, MPU 290 clears thedelete request flag to the “L” level and the process of this flowchartis finished (step S76).

[0306] When the judgement of step S75 is NO, MPU 290 waits for the endof deleting files in the flash memory because the flash memory is in the“H” level.

[0307] Also, when the judgement of step S63 is NO, MPU 290 makes ajudgement if electronic timepiece 200 receives any signal from station100 by using recharging and/or communication judgement signal Sc/c (stepS64).

[0308] When the result of the judgement at step S64 is NO, MPU 290remains waiting.

[0309] When the result of the judgement at step S64 is YES, MPU 290accesses to RAM 270 to see if the delete request flag has the “H” level(step S65).

[0310] When the delete request flag has the “L” level (step S65 NO), MPU290 remains waiting.

[0311] When the delete request flag has the “H” level (step S65 YES),MPU 290 measures a voltage of battery 220. Then, when MPU 290 makes ajudgement that the charge in the rechargeable battery is not sufficientto delete files in flash memory 280, MPU 290 drives transistor 263 andissues a recharge command to station 100 by using coil 210 of electronictimepiece 200 (step S66).

[0312] Then MPU 290 makes a judgement if charging the battery is startedby station 100 by using recharging and/or communication judgement signalSc/c.

[0313] When the charging is not started (step S67 NO), MPU 290 remainswaiting.

[0314] When the charging is started (step S67 YES), MPU 290 issuesdelete command to flash memory 280 (step S68).

[0315] In this case, the battery is charged intermittently with a dutyfactor of 50 (%). Also, the charging the battery lasts for apredetermined time period in order to display various messages such aserror message. The duty factor may be changed according to the chargedcapacity of rechargeable battery 220. Also, when the charged capacityexceeds a predetermined value, it is possible to change fromintermittent to continuous charging.

[0316] MPU 290 then makes a judgment if 1.5 seconds has passed after theissue of the delete command (step S69).

[0317] Until 1.5 seconds has passed, the judgment at step S69 is NO, soMPU 290 remains waiting. After 1.5 seconds has passed, the judgment atstep S69 is YES, so MPU 290 makes a judgment if ready/busy signal Sr/bhas the “L” level (step S70). When ready/busy signal Sr/b has the “L”level, flash memory 280 is in busy state.

[0318] When the judgment at step S70 is NO, MPU 290 ends the processsince deleting files is finished.

[0319] When ready/busy signal Sr/b has the “L” level (step S70 YES),deleting files in the flash memory has not yet been finished. This mightbe because deleting files can not be done due to lack of battery power.Therefore, MPU 290 issues a temporally-stop-command to flash memory 280(step S71) for waiting until charging is completed. Then MPU 290 makes ajudgment if the charging battery is finished based on recharging and/orcommunication judgement signal Sc/c (step S72).

[0320] When the charging has not been finished at the judgment at stepS72, MPU 290 waits until the charging is finished.

[0321] When the charging the battery is finished at the judgment at stepS72, MPU 290 makes a judgment if ten temporally-stop-commands have beenissued to flash memory 280 (step S73).

[0322] When judgment at step S73 is YES, there might be some trouble inrechargeable battery 220. Therefore, MPU 290 stops deleting files andsets the delete request flag to the “L” level (step S75) to performnotification to the user.

[0323] When less than 10 temporary-stop-commands have been issued andthe judgment at step S73 is NO, MPU 290 returns the process to S66 andissues a charge command (step S66) again, and the same process isrepeated.

[0324] [6] Modifications of the Fourth Embodiment

[0325] [6.1] First Modification

[0326] In the above explanation, the file deleting request switch 275activates deleting files in the flash memory. However, when the datatransmitted from the station 100 has a delete request command, MPU 290may, after finishing the communication that includes the delete requestcommand, issue the charge command to station 100 and then MPU 290 maydelete or write data in flash memory 280 at the same time whenrecharging the battery is started.

[0327] [6.2] Second Modification

[0328] In the above, only deleting files in flash memory 280 isexplained. However, the present invention can be applied to writing datain flash memory 280.

[0329] Also, when deleting, writing, and relocating data in flash memory280, MPU 290 may first delete and write data in flash memory 280 andrecharge the battery at the same time, then MPU 290 may arrange the usedarea and the unused area of flash memory.

[0330] [6.3] Third Modification

[0331] In the above explanation, after rechargeable battery 220 is fullycharged, files in flash memory 280 are deleted using rechargeablebattery 220. However, it is possible to directly use station 100 aspower supply to delete files in flash memory 280.

[0332] [6.4] Fourth Modification

[0333] In the above explanation, the station 100 is used as batterycharger and electronic timepiece 200 is used as a recharged device.However, the present invention may be applied to all the electronicapparatus with devices whose power consumption is relatively high like aflash memory. The present invention can also be applied to a batterycharger and a rechargeable device with a rechargeable battery and a highload device such as a cordless phone, a mobile telephone, a personalhandy phone, or a portable computer, a personal digital assistance(PDA). And the high load device may be a flash memory, anelectroluminescence (EL) display, a vibrator motor, a buzzer, or an LED.

[0334] According to the fourth embodiment, a system with a high loaddevice does not fail even when the high load device is driven due to thedecline of the voltage incurred by the drive of the high load device.

[0335] [6.5] Fifth Modification

[0336] In the above description, as a rechargeable battery, lithium-ionrechargeable battery is used. However, the lithium-ion battery has somedrawbacks, one such a drawback is dendrite. When voltage higher thanlimit voltage is applied to lithium-ion battery, dendrite crystal mightbe grown in the battery, and by this, paths of short circuit might beformed. These phenomenons shorten the life of the battery. Therefore, aprevention method for overcharging has been demanded. One method desiredis when recharging rechargeable battery, charging is conducted inconstant current until the voltage of the battery reaches the limitvoltage, then charging is stopped. Therefore, the following rechargingmethod may be used.

[0337] First, for the sake of understanding, the conventional preventionmethod of overcharging will be explained.

[0338]FIG. 15 is a block diagram that shows a conventional electronictimepiece and a conventional battery charger.

[0339] An electronic timepiece 300 is equipped with a rechargeablebattery 310, a limiter controller circuit 320, a coil 380, a diode 390,and a transistor 370.

[0340] Rechargeable battery 310 functions as a power supply.

[0341] Limiter controller circuit 320 carries out controlling so thatovercharging rechargeable battery 310 may not happen.

[0342] In coil 380, voltage is induced by magnetic field. Then thevoltage is used to charge rechargeable battery 310.

[0343] Diode 390 rectifies the flow of the electrical current.

[0344] Transistor 370 functions as a switch to start and stop chargingunder control of limiter controller circuit 320.

[0345] Also, a charging device 400 is equipped with a coil 401 and ahigh-frequency power supply 402.

[0346] The coil is used as a primary coil, when coil 380 is used as asecondary coil.

[0347] The high-frequency power supply supplies an alternating voltage.

[0348] Limiter controller circuit 320 is equipped with a regulator 321,resistors 323 and 324, and a comparator 325.

[0349] Regulator 321 outputs a reference voltage V02 (for example, 2.5volts).

[0350] Resistors 323 and 324 divide voltage of rechargeable battery 310to generate a detection target voltage V01.

[0351] Comparator 325 compares reference voltage V02 with detectiontarget voltage V01 and outputs the result.

[0352] With referring to FIG. 15, operation of charging is explained.

[0353] When starting charging battery, voltage of rechargeable battery310 is low. Therefore, detection target voltage V01 is low and at thisstage lower than reference voltage V02 output from regulator 321.

[0354] So, comparator 325 outputs a detection result signal V03 havingthe “L” level.

[0355] When the detection result signal has the “L” level, transistor370 is in the OFF state. Therefore, electrical current does not flowfrom drain terminal T1 to source terminal T3. Consequently, chargingrechargeable battery 310 continues.

[0356] When detection target voltage V01 exceeds reference voltage V02after charging the battery, detection result voltage V03 output fromcomparator 325 is changed from the “L” level to the “H” level.

[0357] Then transistor 325 is turned ON. By this, both terminals of coil380 are directly connected to the ground level, so the induced voltagein coil 380 does not charge rechargeable battery 310.

[0358] As described, when the voltage in rechargeable battery 310reaches the limit voltage, charging rechargeable battery 310 is stopped.

[0359] However, there may be a drawback in the above charging methodbecause there is an individual difference in characteristic of regulatorand resistor. Namely, there may be a variation in resistance ofresistors 323 and 324, so voltage V01 might have variation. Also,reference voltage V02 output from regulator 321 might have variationtoo. Further, characteristic of comparator 325 might have variation, sothe point where the output level changes from the “L” to the “H” mighthave variation. Therefore, the point where transistor 370 is turnedbetween ON to OFF might have variation.

[0360] As a result, limiter controller circuit 320 does not workproperly, whereby overcharging might happen, which shortens the life ofthe battery.

[0361] Also, when limiter controller circuit 320 stops charging beforevoltage of the battery reaches the limit voltage, charging efficiency isimpaired and usable time period of electronic timepiece 300 isshortened.

[0362] A: Configuration of the Fifth modification

[0363] Next, the fifth modification will be described.

[0364]FIG. 12 is a diagram showing main units of an electronic timepiecewith a rechargeable battery and a charger for the rechargeable battery.

[0365] Electronic timepiece 200 is equipped with a rechargeable battery220, a limiter controller circuit 2120, a coil 210, a diode 2190, and atransistor 2170.

[0366] Rechargeable battery 220 supplies power.

[0367] Limiter controller circuit 2120 conducts control for preventingrechargeable battery 220 from being overcharged.

[0368] In coil 210, voltage is induced by electromagnetic induction.

[0369] Diode 2190 rectifies the electrical current.

[0370] Transistor 2170 functions as a switch to start and stoprecharging the rechargeable battery under control of limiter controllercircuit 2120.

[0371] Charger 100 has a coil 110 and a high-frequency power supply 102.

[0372] High-frequency power supply 102 feeds an alternating current tocoil 110. This induces magnetic fields around coil 110.

[0373] High-frequency power supply 102 in this embodiment is acommercial power supply.

[0374] Limiter controller circuit 2120 has a regulator 2121, adigital/analog converter (DAC) 2126, resistors 2123 and 2124, and acomparator 2125.

[0375] Regulator 2121 outputs constant voltage Vreg (for example 2.5Volts).

[0376] DAC 2126 outputs a reference voltage Vdac.

[0377] Resistors 2123 and 2124 divide the voltage of rechargeablebattery 220 to output a detection target voltage Vr.

[0378] Comparator 2125 compares reference voltage Vdac with detectiontarget voltage Vr to output a detection result voltage Vcom.

[0379] Limiter controller circuit 2120 also has a CPU 2128 that carriesout controlling of limiter controller circuit 2120. CPU 2128 has a DACbuffer 2127 for storing value that is set in DAC 2126.

[0380] Regulator 2121 outputs constant voltage (for example 2.5 Volts)that is lower than the voltage (for example 3.94 Volts) supplied fromrechargeable battery 220 to regulator 2121.

[0381] The regulator in this fifth modification outputs constant voltageof 2.5 Volts.

[0382] Comparator 2125 compares voltages supplied to the input terminalsthat are non-inverted input terminal and inverted input terminal, thenoutputs the comparison result. To illustrate, when voltage input to thenon-inverted input terminal is higher than that of the inverted inputterminal, comparator 2125 outputs detection result voltage Vcom havingthe “H” level. And when voltage input to the inverted input terminal ishigher than that of the non-inverted input terminal, comparator 2125outputs detection result voltage Vcom having “L” level.

[0383] Transistor 2170 is an n-channel transistor, and its drainterminal T1 is connected to one terminal of the power supply, and itssource terminal T3 is connected to the ground. Transistor 2170 is turnedOFF state when its gate terminal T2 is connected to “L” level signal,and is turned ON state when its gate terminal T2 is connected to “H”signal.

[0384] When transistor 2170 is turned OFF, electrical current cannotflow from drain terminal T1 to source terminal T3. Therefore, there isno influence on charging rechargeable battery 220.

[0385] However, when transistor 2170 is turned ON, electronic currentcan flow from drain terminal T1 to source terminal T3. Therefore, coil210 is directly connected to the ground level, thereby the inducedvoltage between the terminals of coil 210 does not charge the battery.

[0386] DAC 2126 also has a function of outputting voltage Vdac based ona set value in DAC 2126. To illustrate, the set value in DAC 2126 can beset from “00” to “FF”. When “FF” is set, DAC 2126 outputs voltage as itreceives. When “00” is set, DAC 2126 outputs voltage DAC 2126 canoutput: in this explanation, DAC 2126 outputs 0 volts. When the setvalue in DAC 2126 is somewhere in from “00” to “FF”, DAC 2126 outputsvoltage based on the set value.

[0387] B: Operation of the Fifth Modification

[0388] Before charging battery of electronic timepiece 200 of the fifthmodification, one set value Dset of DAC 2126 is obtained, so that DAC2126 can output reference voltage Vdac that is equal to the limitvoltage of rechargeable battery 220.

[0389] Below, explanation is given of operation in obtaining set valueDset in DAC 2126 (initial adjustment), of operation in chargingrechargeable battery 220 after set value Dset is obtained (recharging).

[0390] B1: Initial Adjustment

[0391] Before charging battery, obtaining set value Dset which is presetin DAC 2126 is a distinctive feature of the fifth modification.Determination of set value Dset is done for every electronic timepiece200, and this determination is controlled by CPU 2128.

[0392] The flowchart in FIG. 13 is for operation of CPU 2128 indetermining set value Dset for DAC 2126.

[0393] In FIG. 12, rechargeable battery 220 is replaced with a constantvoltage power supply that outputs limit voltage Vlim (3.94 volts). Thenregulator is supplied with the limit voltage Vlim and outputs constantvoltage Vreg that is 2.5 volts in this explanation. Constant voltageVreg is supplied to DAC 2126 (step S81).

[0394] On the other hand, resistors 2123 and 2124 divides the limitvoltage Vlim having 3.94 volts to generate a reference voltage Vr. Forexample, when the limit voltage Vlim is halved, the reference voltage Vrhas 1.97 volts. Then the reference voltage Vr is applied to thenon-inverted input terminal of comparator 2125.

[0395] Since the reference voltage Vr is generated from constant voltagepower supply, it has constant value and is used as reference voltage indetermining set value Dset for DAC 2126.

[0396] Next, CPU 2128 sets “FF” as a provisional value to set value Dset(step S82). Then DAC 2126 outputs voltage Vreg (2.5 volts) as isreceived from regulator 2121 as voltage Vdac. Voltage Vdac is input tothe inverted input terminal of comparator 2125.

[0397] Then level of comparison result signal Vcom output by comparator2125 is determined under control of CPU 2128 (step S83). Sincecomparator 2125 receives the reference voltage Vr (1.97 volts) in thenon-inverted input terminal and voltage Vdac (2.5 volts) in the invertedinput terminal, so comparator 2125 outputs comparison result signal Vcomhaving “L” level.

[0398] When CPU 2128 determines that comparison result signal has the“L” level (step S84 NO), CPU 2128 subtracts 1 from set value Dset (stepS85) to obtain “FE” in this case.

[0399] By this, voltage Vdac is slightly lowered. In this case, voltageVdac becomes a bit lower than 2.5 volts.

[0400] Then again comparison result signal is checked (step S83). Atthis time, comparator receives the reference voltage Vr (1.97 volts) inthe non-inverted input terminal and voltage Vdac (slightly below 2.5volts) in the inverted input terminal, so comparator 2125 outputscomparison result signal Vcom still having “L” level.

[0401] Again when CPU 2128 determines that comparison result signal hasthe “L” level (step S84 NO), CPU 2128 subtracts 1 from set value Dset(step S85) to obtain “FD” in this case.

[0402] Similarly, as set value Dset decreases one by one, voltage Vdacdecreases. Ultimately, voltage Vdac becomes equal to or lower than thereference voltage Vr (1.97 volts), then comparator 2125 outputscomparison result signal Vcom still having “H” level.

[0403] When CPU 2128 determines that comparison result signal is changedfrom the “L” level to the “H” level (step S84 YES), CPU 2128 reads setvalue Dset in DAC 2126 at that moment and then writes it to DAC buffer2127 (step S86). Later, when charging rechargeable battery 220 ofelectronic timepiece 200, this set value Dset will be used as the setvalue for DAC 2126.

[0404] B2: Recharging

[0405] After acquiring DAC setting value Dset for DAC 2126 as describedabove, rechargeable battery 220 is charged. Operation for this chargingwill be described next.

[0406] First, outline of recharging operation will be described withreferring to FIG. 12.

[0407] When high-frequency power supply 102 is turned ON, high-frequencysignals are fed to coil 110 to generate magnetic field around coil 110.By this magnetic field, voltage is induced around coil 210 of electronictimepiece 200. Induced voltage around coil 210 causes electricalcurrent. Diode 2190 rectifies this electrical current. Then rechargeablebattery is charged by this current. When rechargeable battery 220 ischarged until its limit voltage Vlim, transistor 2170 is turned ON undercontrol of limiter controller circuit 2120. Therefore, charging batteryis stopped.

[0408] Next, detail of recharging operation will be described.

[0409] The program shown in FIG. 14 shows operation of CPU 2128 whenstarting to charge rechargeable battery 220.

[0410] CPU 2128 first reads set value Dset stored in DAC buffer 2127 andsets it to DAC 2126 (step S91).

[0411] Then set value Dset is determined whether it is in a prescribedrange, in this explanation determination is made whether it is withinthe range from “BD” to “DA” (step S92). This range is pre-calculated bytaking variation of electric characteristics of all the elements (suchas resistor 123 etc.) of electronic timepiece 200 into consideration andis pre-stored in an unshown memory in CPU 2128

[0412] When set value Dset is not within a prescribed range (step S92NO), then another value (in FIG. 14, BD that is lowest within BD to DA)that is in the prescribed range and safe enough for charging battery isrewritten in DAC 2126 (step S93) and also written in DAC buffer 2127(step S94) as set value Dset.

[0413] Using a value that is in the prescribed range and safe enough forcharging battery is to prevent overcharging.

[0414] Above is operation of CPU 2128 when starting to chargerechargeable battery 220.

[0415] Above operation is to prevent limiter controller circuit 2120from being malfunctioning. For example, when inappropriate value such as“00” or “FF” is set in set value Dset for any reason and chargingrechargeable battery 220 is conducted, limiter controller circuit 2120does not function properly. Hence, charging battery after batteryvoltage reaches its limit voltage may happen, also charging battery maystop before battery voltage reaches its limit voltage.

[0416] In order to avoid such a situation, range of set value Dset ispredetermined and CPU 2128 controls to prevent set value Dset from beingset out of the predetermined range. Therefore, even when inappropriatevalue such as “00” or “FF” is set as set value Dset, CPU 2128 canrewrite set value Dset (in this case, to “BD”) that is safe enough notto overcharge battery in theory.

[0417] Hence, life of rechargeable battery 220 may not be shortened byinappropriate value settings.

[0418] Next, explanation of charging battery conducted after set valueDset is set in DAC 2126 as described.

[0419] When charging is started, voltage of rechargeable battery 220 islow, so the reference voltage Vr is also low and lower than voltage Vdacoutput from DAC 2126.

[0420] Therefore, comparator 2125 outputs comparison result signal Vcomhaving “L” level.

[0421] When comparator 2125 outputs “L” level signal, transistor 2170 isin OFF state. Therefore, electrical current does not flow from drainterminal T1 to source terminal T3. Consequently, charging batterycontinues.

[0422] When the reference voltage Vr exceeds voltage Vdac after chargingthe battery, comparison result signal Vcom output from comparator 325 ischanged from the “L” level to the “H” level.

[0423] Then transistor 2170 is turned ON. By this, both terminals ofcoil 210 are connected directly to the ground level, so the inducedvoltage in coil 2170 does not charge rechargeable battery 220.

[0424] As described, when voltage in rechargeable battery 220 reacheslimit voltage Vlim, charging rechargeable battery 220 is stopped.

[0425] C: Modifications of the Fifth Modification

[0426] (1) First Modification

[0427] Determination of set value Dset may be carried out by a personalcomputer (PC) that is connected to electronic timepiece 200 as externalcontroller and by controlling General Purpose Interface Bus (GPIB).

[0428] For example, comparison result signal Vcom output from comparator2125 is sent to a PC via GPIB by using a dedicated software. Then a CPUin the PC sees the level of comparison result signal Vcom and conducts aprogram that follows the flowchart shown in FIG. 13 to obtain set valuefor DAC 2126 and write it to DAC buffer 2127.

[0429] In this case, electronic timepiece 200 does not have to haveprogram for obtaining set value Dset for DAC 2126.

[0430] (2) Second Modification

[0431] In the above explanation, a regulator is used for a unit thatoutputs constant voltage. However, other circuit may be used such as theone with diode or operational amplifier that outputs constant voltage.

[0432] (3) Third Modification

[0433] In the above explanation, the eight-bit DAC 2126 is used andvalue with eight bits is set in DAC 2126. However, using a DAC with moreresolution and thus using more number of bits would enable more precisecharging than in the above explanation.

[0434] (4) Fourth Modification

[0435] The transistor used to control starting and stopping charging thebattery may be changed to other switching element. When a switchingelement can be switched ON and OFF by detection result voltage Vcom, theswitching element may be used in the present invention.

[0436] (5) Fifth Modification

[0437] When a rechargeable battery is recharged many times, its internalresistance is changed. By taking this characteristic into consideration,it is possible to enable user to voluntarily set set value Dset in DAC2126. Or it is also possible to configure the system to automaticallyrewrite set value Dset by measuring internal resistance of rechargeablebattery.

1. An electronic apparatus comprising: a power supply that suppliespower; a driven unit that is driven by the power from the power supply;a dummy load that discharges the power supply; a switch that connects ordisconnects the dummy load to or from the power supply; a storage unitthat associates and stores both a voltage of the power supply on whichno load is imposed and a voltage of the power supply with its internalresistance being a highest allowable value and the dummy load beingconnected, the highest allowable value of the internal resistance beingthe highest internal resistance of the power supply that can drive thedriven unit when no load is connected; a voltage measurement unit thatmeasures voltage of the power supply; a comparison unit that compares afirst voltage and a second voltage, the first voltage, measured by thevoltage measurement unit, being a voltage of the power supply with thedummy load being connected, and the second voltage being the voltage ofthe power supply with its internal resistance being the highestallowable value and the dummy load being connected and the secondvoltage being read from the storage unit according to a voltage,measured by the voltage measurement unit, of the power supply with noload being connected; and a determination unit that determines whetherthe driven unit can be driven based on the comparison result, and, whenit is possible to drive the driven unit, drives the driven unit.
 2. Anelectronic apparatus of claim 1: wherein determination unit drives thedriven unit when a voltage of the power supply with the dummy load beingconnected is higher than a voltage of the power supply with the highestallowable internal resistance and the dummy load being connected.
 3. Anelectronic apparatus of claim 1: wherein resistance of the dummy load issmaller than resistance of the driven unit and is larger than apredetermined value.
 4. An electronic apparatus of claim 3: wherein thepredetermined value is more than one tenth of resistance of the drivenunit.
 5. An electronic apparatus of claim 1: wherein, the voltagemeasurement unit, when measuring voltage of the power supply with thedummy load being connected, measures voltage of the power supply when achange rate of voltage of the power supply per unit time falls within apredetermined range after the dummy load is connected to the powersupply.
 6. An electronic apparatus of claim 5: wherein the predeterminedrange is within 5 (mV/msec).
 7. An electronic apparatus of claim 5:wherein the predetermined range is within 0.5 (mV/msec).
 8. Anelectronic apparatus of claim 1: wherein the voltage measurement unit,when measuring voltage of the power supply with no dummy load beingconnected, measures voltage of the power supply when a change rate ofvoltage of the power supply per unit time falls within a predeterminedrange after the driven unit stops driving.
 9. An electronic apparatus ofclaim 8: wherein the voltage measurement unit uses a last-measuredvoltage when the change rate of voltage of the power supply does notfall within the predetermined range within a predetermined time period.10. An electronic apparatus of claim 8: wherein the predetermined rangeis within 5 (mV/msec).
 11. An electronic apparatus of claim 8: whereinthe predetermined range is within 0.5 (mV/msec).
 12. An electronicapparatus of claim 1: wherein the storage unit, conducts a stepwiseincrease of voltage V0 and substitutes voltage V0 into equations (1) and(2) to obtain voltage VTL; associates voltage V0 with address in thestorage unit; and stores voltage VTL as data for the address associatedwith voltage V0; RL=RX·(V0−V4)/V4  (1)VTL=RT·(V0/(RL+RT))  (2) where, RLis a highest allowable internal resistance of the power supply to drivethe driven unit when no load is connected to the power supply, RX is aconverted value of resistance of the driven unit, V0 is a voltage of thepower supply with no load connected, V4 is a lowest allowable voltage ofthe power supply to drive the driven unit, VTL is a voltage of the powersupply with no load being connected and with the highest allowableinternal resistance RL, and RT is a value of resistance of the dummyload.
 13. An electronic apparatus of claim 1, further comprising avoltage regulator that outputs constant voltage; wherein, the drivenunit is supplied with the power via the voltage regulator, and thestorage unit, conducts a stepwise increase of voltage V0 and substitutesvoltage V0 into equations (1) and (2) to obtain voltage VTL; associatesvoltage V0 with address in the storage unit; and stores voltage VTL asdata for the address associated with voltage V0;RL=RX·(V0−V4)/V4−REGd  (1)VTL=RT·(V0/(RL+RT))  (2) where, RL is ahighest allowable internal resistance of the power supply to drive thedriven unit when no load is connected to the power supply, RX is aconverted value of resistance of the driven unit, V0 is a voltage of thepower supply with no load connected, V1 is a voltage of the power supplywith the dummy load connected, V4 is a lowest allowable voltage of thepower supply to drive the driven unit, REGd is a value of resistanceconverted from voltage drop of the voltage regulator, VTL is a voltageof the power supply with the dummy load being connected and with thehighest allowable internal resistance RL, and RT is a value ofresistance of the dummy load.
 14. An electronic apparatus of claim 1,further comprising a voltage regulator that outputs constant voltage;wherein, the driven unit is supplied with the power via the voltageregulator and is able to operate with voltage lower than the constantvoltage; and the storage unit, conducts a stepwise increase of voltageV0 and substitutes voltage V0 into equations (1) and (2) to obtainvoltage VTL; associates voltage V0 with address in the storage unit; andstores voltage VTL as data for the address associated with voltage V0;RL=RX·(V0−V4)/V4−REGd−REGdd·(REGout−V4)  (1)VTL=RT·(V0/(RL+RT))  (2)where, RL is a highest allowable internal resistance of the power supplyto drive the driven unit when no load is connected to the power supply,RX is a converted value of resistance of the driven unit, V0 is avoltage of the power supply with no load connected, V1 is a voltage ofthe power supply with the dummy load connected, V4 is a lowest allowablevoltage of the power supply to drive the driven unit, REGd is a value ofresistance converted-from voltage drop of the voltage regulator, REGoutis a rated output voltage of the voltage regulator, REGdd is aconversion factor for resistance for voltage drop of the voltageregulator in a case where voltage of the power supply is lower than therated output voltage REGout of the voltage regulator, VTL is a voltageof the power supply with the dummy load being connected and with highestallowable internal resistance RL, and RT is a value of resistance of thedummy load.
 15. An electronic apparatus of claim 12: wherein, when aplurality of driven units are driven at the same time, and convertedvalue RX of resistance of the driven units is combined convertedresistance of all driven units.
 16. An electronic apparatus of claim 1,further comprising a voltage regulator that outputs constant voltage;wherein, the driven unit comprises a first driven unit that is suppliedwith the power from the power supply and a second driven unit that issupplied with the power via the voltage regulator, the first and thesecond driven units being driven at the same time; and the storage unit,conducts a stepwise increase of voltage V0 and substitutes voltage V0into equations (1), (2), and (3) to obtain voltage VTL; associatesvoltage V0 with address in the storage unit; and stores voltage VTL asdata for the address associated with voltage V0;RL1=(V0−V4)/((V4/Rmo)+(V4/(Reb+REGd)))  (1) $\begin{matrix}\begin{matrix}{{RL2} = \left( {{V0} - {\left( {{V4} + \left( {{V4} \cdot {{REGd}/{Reb}}} \right)} \right){)/\left( {\left( {{V4}/{Reb}} \right) +} \right.}}} \right.} \\\left. \left( {\left( {\left( {{V4} \cdot {{REGd}/{Reb}}} \right) + {V4}} \right)/{Rmo}} \right) \right)\end{matrix} & (2)\end{matrix}$

VTL=RT·(V0/(RL+RT))  (3) where, RL1 is a highest allowable internalresistance of the power supply to drive the first driven unit, RL2 is ahighest allowable internal resistance of the power supply to drive thesecond driven unit, RL is a highest allowable internal resistance of thepower supply to drive the driven unit when no load is connected to thepower supply, and is equal to RL1 when RL1 is smaller than RL2 or equalto RL2 when RL2 is smaller than RL1, V0 is a voltage of the power supplywith no load connected, V1 is a voltage of the power supply with thedummy load connected, V4 is a lowest allowable voltage of the powersupply to drive the driven unit, Rmo is a converted resistance of thefirst driven unit, Reb is a converted resistance of the second drivenunit, REGd is a value of resistance converted from voltage drop of thevoltage regulator, VTL is a voltage of the power supply with the dummyload being connected and with highest allowable internal resistance RL,and RT is a value of resistance of the dummy load.
 17. An electronicapparatus of claim 1: further comprising a voltage regulator thatoutputs constant voltage REGout; wherein, the driven unit comprises afirst driven unit that is supplied with the power from the power supplyand a second driven unit that is supplied with the power via the voltageregulator and is able to operate with voltage lower than the constantvoltage REGout, the first and the second driven units being driven atthe same time; and the storage unit, conducts a stepwise increase ofvoltage V0 and substitutes voltage V0 into equations (1), (2), and (3)to obtain voltage VTL; associates voltage V0 with address in the storageunit; and stores voltage VTL as data for the address associated withvoltage V0;RL1=(V0−V4)/((V4/Rmo)+V4/(Reb+REGd+(REGdd·(REGout−V4))))  (1)$\begin{matrix}\begin{matrix}{{RL2} = \left( {{V0} - \left( {{V4} + {{V4} \cdot \left( {{REGd} +} \right.}} \right.} \right.} \\{\left. \left. \left. \left. {\left. {{REGdd} \cdot \left( {{REGout} - {V4}} \right)} \right)/{Reb}} \right) \right) \right) \right)/\left( {\left( {{V4}/{Reb}} \right) +} \right.} \\\left. \left( {\left( \left( {{V4} \cdot {\left( {{REGd} + {{REGdd} \cdot \left( {{REGout} - {V4}} \right)}} \right)/{Reb}}} \right) \right) + {{V4}/{Rmo}}} \right) \right)\end{matrix} & (2)\end{matrix}$

VTL=RT·(V0/(RL+RT))  (3) where, RL1 is a highest allowable internalresistance of the power supply to drive the first driven unit, RL2 is ahighest allowable internal resistance of the power supply to drive thesecond driven unit, RL is a highest allowable internal resistance of thepower supply to drive the driven unit when no load is connected to thepower supply, and is equal to RL1 when RL1 is smaller than RL2 or equalto RL2 when RL2 is smaller than RL1, V0 is a voltage of the power supplywith no load connected, V1 is a voltage of the power supply with thedummy load connected, V4 is a lowest allowable voltage of the powersupply to drive the driven unit, Rmo is a converted resistance of thefirst driven unit, Reb is a converted resistance of the second drivenunit, REGd is a value of resistance converted from voltage drop of thevoltage regulator, REGdd is a conversion factor for resistance forvoltage drop of the voltage regulator in a case where voltage of thepower supply is lower than constant voltage REGout, VTL is a voltage ofthe power supply with the dummy load being connected and with highestallowable internal resistance RL, and RT is a value of resistance of thedummy load.
 18. An electronic apparatus of claim 12: wherein the storageunit sets voltage V0 of the power supply with no load being imposed aslower order bit of the address, sets a drive request of driven units ashigher order bit of the address, and stores voltage VTL as data of theaddress specified by the lower order bit and the higher order bit.
 19. Acontrol method of an electronic apparatus: the electronic apparatuscomprising; a power supply that supplies power; a driven unit that isdriven by the power from the power supply; a dummy load that dischargethe power supply; a switch that connects or disconnects the dummy loadto or from the power supply; and a storage unit that associates andstores both a voltage of the power supply on which no load is imposedand a voltage of the power supply with its internal resistance being ahighest allowable value and the dummy load being connected, the highestallowable value of the internal resistance being the highest internalresistance of the power supply that can drive the driven unit when noload is connected; a voltage measurement unit that measures voltage ofthe power supply; the control method comprising; comparing a firstvoltage and a second voltage, the first voltage, measured by the voltagemeasurement unit, being a voltage of the power supply with the dummyload being connected, and the second voltage being the voltage of thepower supply with its internal resistance being the highest allowablevalue and the dummy load being connected and the second voltage beingread from the storage unit according to a voltage, measured by thevoltage measurement unit, of the power supply with no load beingconnected; determining whether the driven unit can be driven based onthe comparison result; and driving the driven unit when it is determinedthat driving the driven unit is possible.
 20. A control method of anelectronic apparatus of claim 19: wherein the voltage measurement unit,when measuring voltage of the power supply with the dummy load beingconnected, measures voltage of the power supply when a change rate ofvoltage of the power supply per unit time falls within a predeterminedrange after the dummy load is connected to the power supply.
 21. Acontrol method of an electronic apparatus of claim 20: wherein thepredetermined range is within 5 (mV/msec).
 22. A control method of anelectronic apparatus of claim 20: wherein the predetermined range iswithin 0.5 (mV/msec).
 23. A control method of an electronic apparatus ofclaim 19: wherein the voltage measurement unit, when measuring voltageof the power supply with the dummy load being connected, measuresvoltage of the power supply when a change rate of voltage of the powersupply per unit time falls within a predetermined value after the drivenunit stops driving.
 24. A control method of an electronic apparatus ofclaim 23: wherein the voltage measurement unit use a last-measuredvoltage when the change rate of voltage of the power supply does notfall within the predetermined range within a predetermined time period.25. A control method of an electronic apparatus of claim 20: wherein thepredetermined range is within 5 (mV/msec).
 26. A control method of anelectronic apparatus of claim 20: wherein the predetermined range iswithin 0.5 (mV/msec).
 27. A control method of an electronic apparatus ofclaim 19: the control method comprising; conducting a stepwise increaseof voltage V0 and substituting voltage V0 into equations (1) and (2) toobtain voltage VTL; associating voltage V0 with address in the storageunit; and storing voltage VTL as data for the address associated withvoltage V0; RL=RX·(V0−V4)/V4  (1)VTL=RT·(V0/(RL+RT))  (2) where, RL is ahighest allowable internal resistance of the power supply to drive thedriven unit when no load is connected to the power supply, RX is aconverted value of resistance of the driven unit, V0 is a voltage of thepower supply with no load connected, V4 is a lowest allowable voltage ofthe power supply to drive the driven unit, VTL is a voltage of the powersupply with no load being connected and with highest allowable internalresistance RL, and RT is a value of resistance of the dummy load.
 28. Acontrol method of an electronic apparatus of claim 19: the electronicapparatus further comprising a voltage regulator that outputs constantvoltage; wherein, the driven unit is supplied with the power via thevoltage regulator, and the control method further comprising; conductinga stepwise increase of voltage V0 and substituting voltage V0 intoequations (1) and (2) to obtain voltage VTL; associating voltage V0 withaddress in the storage unit; and storing voltage VTL as data for theaddress associated with voltage V0;RL=RX·(V0−V4)V4−REGd  (1)VTL=RT·(V0/(RL+RT))  (2) where, RL is a highestallowable internal resistance of the power supply to drive the drivenunit when no load is connected to the power supply, RX is a convertedvalue of resistance of the driven unit, V0 is a voltage of the powersupply with no load connected, V1 is a voltage of the power supply withthe dummy load connected, V4 is a lowest allowable voltage of the powersupply to drive the driven unit, REGd is a value of resistance convertedfrom voltage drop of the voltage regulator, VTL is a voltage of thepower supply with the dummy load being connected and with highestallowable internal resistance RL, and RT is a value of resistance of thedummy load.
 29. A control method of an electronic apparatus of claim 19:the electronic apparatus further comprising a voltage regulator thatoutputs constant voltage; wherein, the driven unit is supplied with thepower via the voltage regulator and is able to operate with voltagelower than the constant voltage; and the control method furthercomprising; conducting a stepwise increase of voltage V0 andsubstituting voltage V0 into equations (1) and (2) to obtain voltageVTL; associating voltage V0 with address in the storage unit; andstoring voltage VTL as data for the address associated with voltage V0;RL=RX·(V0−V4)/V4−REGd−REGdd·(REGout−V4)  (1)VTL=RT·(V0/(RL+RT))  (2)where, RL is a highest allowable internal resistance of the power supplyto drive the driven unit when no load is connected to the power supply,RX is a converted value of resistance of the driven unit, V0 is avoltage of the power supply with no load connected, V1 is a voltage ofthe power supply with the dummy load connected, V4 is a lowest allowablevoltage of the power supply to drive the driven unit, REGd is a value ofresistance converted from voltage drop of the voltage regulator, REGoutis a rated output voltage of the voltage regulator, REGdd is aconversion factor for resistance for voltage drop of the voltageregulator in a case where voltage of the power supply is lower thanrated output voltage REGout of the voltage regulator, VTL is a voltageof the power supply with the dummy load being connected and with highestallowable internal resistance RL, and RT is a value of resistance of thedummy load.
 30. A control method of an electronic apparatus of claim 27:wherein, when a plurality of driven units are driven at the same time,converted value RX of resistance of the driven units is combinedconverted resistance of all driven units.
 31. A control method of anelectronic apparatus of claim 19, the electronic apparatus furthercomprising a voltage regulator that outputs constant voltage; wherein,the driven unit comprises a first driven unit that is supplied with thepower from the power supply and a second driven unit that is suppliedwith the power via the voltage regulator, the first and the seconddriven units being driven at the same time; and the control methodfurther comprising; conducting a stepwise increase of voltage V0 andsubstituting voltage V0 into equations (1), (2), and (3) to obtainvoltage VTL; associating voltage V0 with address in the storage unit;and storing voltage VTL as data for the address associated with voltageV0; RL1=(V0−V4)/((V4/Rmo)+(V4/(Reb+REGd)))  (1) $\begin{matrix}\begin{matrix}{{RL2} = \left( {{V0} - {\left( {{V4} + \left( {{V4} \cdot {{REGd}/{Reb}}} \right)} \right){)/\left( {\left( {{V4}/{Reb}} \right) +} \right.}}} \right.} \\\left. \left( {\left( {\left( {{V4} \cdot {{REGd}/{Reb}}} \right) + {V4}} \right)/{Rmo}} \right) \right)\end{matrix} & (2)\end{matrix}$

VTL=RT·(V0/(RL+RT))  (3) where, RL1 is a highest allowable internalresistance of the power supply to drive the first driven unit, RL2 is ahighest allowable internal resistance of the power supply to drive thesecond driven unit, RL is a highest allowable internal resistance of thepower supply to drive the driven unit when no load is connected to thepower supply, and is equal to RL1 when RL1 is smaller than RL2 or to RL2when RL2 is smaller than RL1, V0 is a voltage of the power supply withno load connected, V1 is a voltage of the power supply with the dummyload connected, V4 is a lowest allowable voltage of the power supply todrive the driven unit, Rmo is a converted resistance of the first drivenunit, Reb is a converted resistance of the second driven unit, REGd is avalue of resistance converted from voltage drop of the voltageregulator, VTL is a voltage of the power supply with the dummy loadbeing connected and with highest allowable internal resistance RL, RT isa value of resistance of the dummy load.
 32. A control method of anelectronic apparatus of claim 19, the electronic apparatus furthercomprising a voltage regulator that outputs constant voltage REGout;wherein, the driven unit comprises a first driven unit that is suppliedwith the power from the power supply and a second driven unit that issupplied with the power via the voltage regulator and is able to operatewith voltage lower than the constant voltage REGout, the first and thesecond driven units being driven at the same time; and the controlmethod further comprising; conducting a stepwise increase of voltage V0and substituting voltage V0 into equations (1), (2), and (3) to obtainvoltage VTL; associating voltage V0 with address in the storage unit;and storing voltage VTL as data for the address associated with voltageV0; $\begin{matrix}\begin{matrix}{{RL1} = {\left( {{V0} - {V4}} \right)/\left( {\left( {{V4}/{Rmo}} \right) +} \right.}} \\\left. {{V4}/\left( {{Reb} + {REGd} + \left( {{REGdd} \cdot \left( {{REGout} - {V4}} \right)} \right)} \right)} \right)\end{matrix} & (1)\end{matrix}$

$\begin{matrix}\begin{matrix}{{RL2} = \left( {{V0} - \left( {{V4} + {{V4} \cdot \left( {{REGd} +} \right.}} \right.} \right.} \\{\left. \left. \left. \left. {\left. {{REGdd} \cdot \left( {{REGout} - {V4}} \right)} \right)/{Reb}} \right) \right) \right) \right)/\left( {\left( {{V4}/{Reb}} \right) +} \right.} \\\left. \left( {\left( \left( {{V4} \cdot {\left( {{REGd} + {{REGdd} \cdot \left( {{REGout} - {V4}} \right)}} \right)/{Reb}}} \right) \right) + {{V4}/{Rmo}}} \right) \right)\end{matrix} & (2)\end{matrix}$

VTL=RT·(V0/(RL+RT))  (3) where, RL1 is a highest allowable internalresistance of the power supply to drive the first driven unit, RL2 is ahighest allowable internal resistance of the power supply to drive thesecond driven unit, RL is a highest allowable internal resistance of thepower supply to drive the driven unit when no load is connected to thepower supply, and is equal to RL1 when RL1 is smaller than RL2 or equalto RL2 when RL2 is smaller than RL1, V0 is a voltage of the power supplywith no load connected, V1 is a voltage of the power supply with thedummy load connected, V4 is a lowest allowable voltage of the powersupply to drive the driven unit, Rmo is a converted resistance of thefirst driven unit, Reb is a converted resistance of the second drivenunit, REGd is a value of resistance converted from voltage drop of thevoltage regulator, REGdd is a conversion factor for resistance forvoltage drop of the voltage regulator in a case where voltage of thepower supply is lower than constant voltage REGout, VTL is a voltage ofthe power supply with the dummy load being connected and with highestallowable internal resistance RL, and RT is a value of resistance of thedummy load.
 33. A control method of an electronic apparatus of claim 27:wherein, voltage V0 of the power supply with no load being imposed isset as lower order bit of the address, a drive request of driven unitsis set as higher order bit of the address, and voltage VTL is set asdata of the address specified by the lower order bit and the higherorder bit.
 34. An electronic apparatus comprising: a power supply thatsupplies a first power; a communication unit that receives power from anexternal power supply and supplies the power as a second power; a drivenunit that is driven by the first or the second power; a determinationunit that determines, when the first power is not sufficient to drivethe driven unit, if power is being supplied from the external powersupply; and a drive prohibit unit that, when the first power is notsufficient to drive the driven unit and when the external power supplydoes not supply enough power to drive the driven unit, prohibits thedriven unit from being driven.
 35. An electronic apparatus of claim 34:wherein the drive prohibit unit that, when the first power is sufficientto drive the driven unit or when enough power is supplied from theexternal power supply to drive the driven unit, lifts the prohibition ofdriving the driven unit.
 36. An electronic apparatus of claim 34, theelectronic apparatus further comprising a storage unit that storesinformation to the effect that the driven unit is prohibited to bedriven.
 37. An electronic apparatus of claim 34: wherein; the powersupply is rechargeable, and the second power is used for recharging thepower supply.
 38. An electronic apparatus of claim 34, furthercomprising: a drive request unit that requests to drive the driven unit.39. An electronic apparatus of claim 34: wherein a request to drive thedriven unit is made via the communication unit.
 40. An electronicapparatus of claim 34: wherein a power is supplied to the power supplyby using electromagnetic induction between a coil in the communicationunit and a coil in the external power supply.
 41. An electronicapparatus of claim 34: wherein the communication unit supplies thesecond power concurrently with starting the driven unit.
 42. Anelectronic apparatus of claim 34: wherein the communication unit isintermittently supplied with power from the external power supply. 43.An electronic apparatus of claim 34: wherein the power supplied from theexternal power supply to the communication unit is kept supplied for apredetermined time period.
 44. An electronic apparatus of claim 34:wherein the driven unit is a flash memory.
 45. An electronic apparatusof claim 44: wherein deleting or writing data in the flash memory isconducted when the second power is supplied from the communication unit.46. A control method of an electronic apparatus: the electronicapparatus comprising; a power supply that supplies a first power; acommunication unit that receives power from an external power supply andsupplies the power as a second power; and a driven unit that is drivenby the first or the second power; the control method comprising;determining if, when the first power is not sufficient to drive thedriven unit, power is being supplied from the external power supply; andprohibiting, when the first power is not sufficient to drive the drivenunit and when the external power supply does not supply enough power todrive the driven unit, the driven unit from being driven.
 47. A controlmethod of an electronic apparatus of claim 46, the method furthercomprising: lifting the prohibition of driving the driven unit when thefirst power is sufficient to drive the driven unit or when enough poweris supplied from the external power supply to drive the driven unit.